ASIC Design Engineer - AI Chip

About the role

Campus Singapore is looking for an ASIC design engineer to design and implement a leading AI inference chip. The role covers microarchitecture design of the AI chip SoC and its subsystems, including AI accelerator units and the NoC/interconnect.

Key responsibilities

• Design the microarchitecture of the AI chip SoC and its subsystems, including AI accelerator units and NoC/interconnect
• Implement the microarchitecture design using HDL
• Optimize performance, timing, area and power of the designs
• Perform critical analysis and propose novel chip architectures for performance, power and area improvement
• Write patents

Required profile

• Bachelor's degree or above in Electrical & Electronic Engineering, Computer Science or equivalent
• Strong learning capability, good communication and collaboration skills
• Fresh graduates are also encouraged to apply

Required skills

• Knowledge of computer architecture, such as AI accelerators, CPUs and network-on-chip
• Familiarity with hardware module development using HDLs
• Preferred: course or personal projects in Verilog, SystemVerilog, FPGA or processor design
• Preferred: exposure to hardware verification, synthesis or timing analysis

What we offer

• Hands-on work on state-of-the-art AI chip architecture design and implementation
• Extensive exposure to advanced-node ASIC design