ASIC Physical Design Engineer

broadcom · Singapore

New

Senior 🇬🇧 English

Synopsys Cadence Siemens RTL synthesis Clock tree synthesis Physical verification Formal verification Timing analysis UNIX/Linux

Job description

About the role

Broadcom is hiring an ASIC Physical Design Engineer. The role covers the design and implementation of integrated circuits of 100 to 400 million gates in 7nm, 5nm, 3nm and 2nm process technologies.

Key responsibilities

Use commercial and in-house EDA tools (for example Synopsys, Cadence, Siemens) to design and implement large-scale integrated circuits.
Handle a full RTL-to-GDS or gates-to-GDS flow, including RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis.

Required profile

Degree, Master's or PhD in electrical/electronics or computer engineering.
At least 8 years of experience in a relevant field.
In-depth knowledge of GPU/CPU/DSP architecture and algorithms, and related physical design techniques, is highly advantageous.

Required skills

EDA tools such as Synopsys, Cadence and Siemens.
Proficiency in UNIX/Linux and scripting languages is advantageous.

Questions fréquentes

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Source : ats:workday

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Published 3 days ago

Expires 1 month from now

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broadcom

Singapore

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