Device Engineer – Yield & D0 Improvement

About the role

As a Device Engineer at STMicroelectronics you will be responsible for yield and D0 improvement of assigned technologies. You will analyse silicon data, support technology and product development, and drive parametric yield and reliability enhancements.

Key responsibilities

• Analyse zero‑yield or low‑yield wafers to achieve yield improvement.
• Resolve process issues in collaboration with modules to ensure smooth line flow and meet customer delivery.
• Characterise process windows to achieve robustness.
• Liaise with division teams (ADG/AMS/AMG/MDG) for technology and product transfer within defined timelines.
• Participate in weekly yield/D0 update calls and master‑plan discussions.
• Conduct MRB meetings regarding disposition of SBL lots on a weekly basis.

Required profile

• Good knowledge of semiconductor device physics (MOSFETs, BJTs, diodes, power devices).
• Bachelor’s degree in Electrical or Electronic Engineering.
• Experience with electrical characterisation equipment (parametric testers, curve tracers, SMUs, LCR meters, probers).
• Basic understanding of semiconductor manufacturing processes (front‑end fabrication, diffusion, implantation, oxidation, lithography, etch, metallisation).
• Data analysis skills using tools such as JMP or Excel.
• Strong communication skills in English, both spoken and written.

Required skills

• Semiconductor device physics
• Electrical characterisation equipment
• JMP
• Microsoft Excel
• Front‑end semiconductor process knowledge