Lithography Process Engineer

About the role

As a Lithography Process Engineer you will sustain, optimise and develop photolithography processes in a high‑volume semiconductor fab. You will work with advanced lithography tools and metrology equipment to ensure tight critical dimension (CD) control, overlay accuracy and low defect levels.

Key responsibilities

• Monitor and analyse SPC/ESPC charts using SPACE and respond to OOC/OOS events.
• Perform CD and overlay analysis with CD‑SEM, scatterometry and overlay metrology tools (e.g., KLA, ASML YieldStar).
• Optimise photoresist coating, soft‑bake, exposure, post‑exposure bake and development steps.
• Manage and tune stepper/scanner exposure tools (ASML, Nikon) for optimal performance.
• Design and execute DOE and split‑lot studies using JMP, Klarity ACE and other statistical tools.
• Troubleshoot lithography defects such as bridging, footing, scumming and resist residues.
• Collaborate with Equipment Engineers on tool qualification, focus‑exposure matrix and process‑window optimisation.
• Maintain reticle management, focus/exposure control and alignment strategies.
• Drive improvements in CD uniformity, overlay performance, line‑edge roughness and CDU.
• Support technology transfers, new product introductions and process ramp‑up.
• Lead cross‑functional teams to resolve yield excursions and implement CAPA.
• Ensure compliance with TS16949 and other quality standards.

Required profile

• Bachelor’s degree in Electrical, Electronics, Mechanical, Mechatronics or Microelectronics Engineering.
• 1–3 years of semiconductor wafer process engineering experience.
• Proven problem‑identification and resolution abilities.
• Willingness to work normal, swing or rotating 12‑hour shifts.

Required skills

• SPC/ESPC analysis (SPACE).
• CD‑SEM, scatterometry and overlay metrology (KLA, ASML YieldStar).
• Photoresist process steps (coating, bake, exposure, PEB, development).
• Stepper/scanner tools (ASML, Nikon).
• Design of Experiments and statistical analysis (JMP, Klarity ACE).
• Lithography defect diagnosis.
• Reticle management and alignment strategies.
• TS16949 quality compliance.