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Principal Component Validation Engineer – HBM Memory

WhiteCrow Research · Singapour

Senior 🇬🇧 English
Linux Python C++ Verilog UVM Git SVN

Job description

About the role

We are seeking a seasoned Principal Component Validation Engineer to lead high‑bandwidth memory (HBM) validation activities for a global technology leader in advanced memory and storage solutions. You will work across cross‑functional teams to ensure silicon performance meets product expectations and drives reliability improvements.

Key responsibilities

  • Coordinate internal and external teams to plan and execute silicon validation activities.
  • Partner with manufacturing to secure required resources and equipment.
  • Identify, evaluate, and validate HBM component validation equipment and test flows.
  • Debug failures, determine root causes, and implement design or process fixes.
  • Collaborate with Design Validation, Quality Assurance, and Global Quality on customer returns and reliability enhancements.
  • Develop, troubleshoot, and validate HBM component test programs.
  • Review datasheets and provide feedback to Application Engineers.
  • Prioritize tasks across multiple cross‑functional teams.
  • Provide technical leadership, mentoring, and on‑the‑job training for engineers.
  • Support technical presentations, seminars, and product‑specific expertise.

Required profile

  • Bachelor's or Master's degree in a relevant field.
  • Minimum 10 years of experience, preferably in the memory semiconductor industry.
  • Strong analytical, debugging, and problem‑solving abilities.
  • Excellent communication and data‑analytics capabilities.
  • Self‑motivated and effective in collaborative team environments.

Required skills

  • Linux operating system.
  • Python programming.
  • C/C++ development.
  • Verilog hardware description language.
  • UVM verification methodology.
  • Version control systems: Git and SVN.

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Published 1 month ago

Expires 5 days from now

47 views · 0 interested

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WhiteCrow Research

Singapour