Analog/Mixed Signal IC Design Engineer

About the role

We are looking for an experienced Analog/Mixed Signal IC Design Engineer to join a multi‑geographical team developing high‑speed analog and mixed‑signal IPs for AI, machine learning, HPC and hyperscale data‑center markets. The role focuses on cutting‑edge 2nm/3nm CMOS technologies and requires a “first‑time‑right” quality mindset.

Key responsibilities

• Design, pre‑layout and post‑layout verification of high‑speed mixed‑signal circuits, including clock distribution networks and RX/TX blocks.
• Develop circuit schematics, perform detailed layout reviews, and run comprehensive simulations using Cadence tools.
• Optimize high‑speed paths for low jitter and low power consumption.
• Conduct design reviews, prepare presentation slides and documentation for internal and customer stakeholders.
• Assist IP integration into SoCs and support validation engineers during silicon bring‑up, debug and characterization.

Required profile

• Bachelor/Master/PhD in Electrical or Electronic Engineering with 10+ years of relevant experience.
• Extensive background in high‑speed custom analog/digital design (SerDes, HBM, UCIe, PLL) and advanced CMOS nodes (A14, 2nm, 3nm); FinFET experience is a plus.
• Proficiency with Cadence Virtuoso suite, including schematic capture, layout, Spectre simulator and ADE environment.
• Demonstrated ability to present technical work to both circuit designers and non‑technical audiences.
• Experience with MATLAB, AMI or 3‑D modeling of high‑speed designs and solid knowledge of industry‑standard interface specifications.

Required skills

• High‑speed mixed‑signal circuit design.
• Clock distribution and high‑speed RX/TX design.
• Cadence Virtuoso (schematic, layout, ADE).
• Spectre circuit simulation.
• MATLAB, AMI and 3‑D modeling.
• FinFET and advanced CMOS node design.