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IC Design Engineer - ASIC Physical Implementation

broadcom · Singapore

New
Senior 🇬🇧 English
Cadence Synopsys Ansys SPICE DRC/LVS Static Timing Analysis Power Integrity Perl Tcl Python

Job description

About the role

Broadcom is looking for an IC Design Engineer for an R&D position focused on the design and physical implementation of high-performance System-On-Chip ASICs. The role involves working with RTL and Physical Design teams to resolve timing violations and taking part in innovation, design flow and methodology development for deep submicron processes.

Key responsibilities

  • Lead a team in the physical design implementation of large ASICs (500 to 800 million gates complexity)
  • Provide technical support to customers and manage customer relationships
  • Use commercial and in-house EDA tools to design and implement 500 to 800 million gate integrated circuits in 5nm, 3nm and 2nm process technologies
  • Collaborate with RTL and Physical Design teams to resolve timing violations through design or constraint optimization
  • Participate in innovation, design flow and methodology development for computing and networking products

Required profile

  • Degree, Master's or PhD in Electrical, Electronics or Computer Engineering with 8 years or more of relevant experience
  • Experience leading a team in physical design of large ASICs
  • Strong technical hands-on competency with leading-edge physical design EDA tools
  • Knowledge of CPU/DSP architecture and algorithms is highly advantageous

Required skills

  • Familiarity with VLSI design tools such as Cadence, Synopsys, Mentor and Ansys for place and route, SPICE simulation, DRC/LVS verification, static timing analysis and power integrity
  • Scripting in Perl, Tcl and Python
  • Strong analytical problem-solving and collaboration in cross-functional teams

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Source : ats:workday

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Published 2 hours ago

Expires 1 month from now

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broadcom

Singapore