Senior Analog Design Engineer (SERDES)

About the role

A global leader in chip manufacturing is looking for an Analog designer who mainly works on SERDES blocks and ASIC products. The role involves precision transistor-level design of critical analog building blocks, from specification through to tape-out.

Key responsibilities

• Define specifications and execute precision transistor-level design for critical analog building blocks.
• Perform comprehensive pre- and post-layout verification.
• Collaborate directly with physical layout engineers on critical device matching, shielding and floorplanning sign-off.

Required profile

• Bachelor's or Master's degree in Electrical Engineering (or equivalent).
• Hands-on experience driving custom analog IPs from architectural specification through successful tape-outs.
• Deep functional background in power management circuits (LDO, BGR, POR) or precision clock generation components.
• Experience supervising floorplanning, matching and parasitic mitigation.

Required skills

• Cadence Virtuoso and SPICE simulation flows.
• Physical sign-off procedures (DRC, LVS, ERC).

Candidates apply online or by sending their CV by email; only shortlisted candidates will be notified.