Senior Staff Engineer, Physical Design

About the role

Marvell builds next-generation processors and ASICs for AI infrastructure, cloud data centers and networking solutions. Its Physical Design team in Singapore is looking for a Senior Staff Engineer to help deliver advanced chips.

Key responsibilities

• Drive RTL-to-GDS implementation, including synthesis, place and route, timing analysis and timing closure.
• Perform timing and logic ECOs to meet power, performance and area (PPA) targets.
• Debug and resolve timing, congestion and implementation challenges on complex designs.
• Develop and improve physical design methodologies, automation and flows using Tcl, Perl and Python.
• Collaborate with RTL, architecture, timing and CAD teams to deliver high-quality silicon products.

Required profile

• Bachelor's degree with 6-8 years of relevant experience, or a Master's/PhD in Electrical Engineering, Computer Engineering, Computer Science or a related field.
• Understanding of the RTL-to-GDS physical design flow and digital design fundamentals.
• Experience with synthesis, place and route and static timing analysis.
• Knowledge of Verilog and/or VHDL.
• Strong analytical, problem-solving and communication skills, with ownership and adaptability in complex technical challenges.

Required skills

• Proficiency in scripting with Tcl, Perl and Python.
• Software development fundamentals.

What we offer

• Eligibility for Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.
• Competitive compensation and benefits.