SoC Digital Verification Engineer, Multimedia Lab

About the role

Join ByteDance's Multimedia Lab to design and verify cutting‑edge video codec hardware accelerators built on FPGA and ASIC platforms. As a SoC Digital Verification Engineer you will create high‑coverage verification plans and automated test environments that ensure the reliability of video encoding solutions serving billions of users worldwide.

Key responsibilities

• Analyze architecture and design specifications to produce comprehensive module‑, subsystem‑, and system‑level test plans.
• Develop and maintain reusable UVM‑based verification environments, including testbenches, scoreboards, monitors, and sequences.
• Implement high‑coverage stimulus and checkers to validate video codec functionality.
• Collaborate with algorithm, architecture, software, firmware, and hardware teams to debug and resolve verification issues.
• Continuously improve verification methodologies and automation scripts.

Required profile

• Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field.
• Strong analytical mindset with the ability to interpret complex hardware specifications.
• Experience working in fast‑paced, cross‑functional development teams.
• Excellent written and verbal communication skills in English.

Required skills

• UVM methodology
• SystemVerilog testbench development
• Scoreboard, monitor, and sequence design
• FPGA and ASIC verification
• Video codec hardware concepts

What we offer

• Positive team atmosphere and career growth opportunities
• Competitive compensation (SGD 6,500‑13,000 per month)
• Paid leave and meals provided
• Exposure to products used by over 100 million users worldwide