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ASIC Design Engineer

hp · Singapore

New
Mid 🇬🇧 English
Verilog SystemVerilog RTL Synopsys Cadence STA FPGA Git Python

Job description

About the role

HP is looking for a motivated ASIC Design Engineer to support the development of digital ASIC components for printing systems. The engineer works closely with experienced engineers and contributes to design implementation, verification and system integration.

Key responsibilities

  • Design and develop functional blocks and subsystems of digital ASICs from specification through RTL implementation, verification, silicon validation and qualification.
  • Support silicon validation and debug activities under the guidance of senior engineers.
  • Collaborate with cross-functional teams on specifications, design reviews and technical documentation.
  • Develop an understanding of Inkjet and LaserJet print architecture and data path requirements.
  • Support FPGA or software-based prototyping of ASIC designs for pre-silicon and post-silicon firmware development and system verification.
  • Contribute to design methodology improvements and tool automation.

Required profile

  • BS or MS degree in Electrical Engineering, Computer Engineering or a related field, with a focus on VLSI or digital design.
  • Minimum of 3 years of ASIC or SoC design experience.
  • Familiarity with the digital ASIC/SoC design flow from RTL through silicon characterization.
  • Strong analytical and problem-solving skills, good communication and teamwork skills, and willingness to learn.

Required skills

  • Proficiency in Verilog/SystemVerilog.
  • Familiarity with Synopsys and Cadence EDA tools for simulation, synthesis, STA, formal verification and assertion-based verification.
  • Scripting or programming languages such as Python, Perl, C or C++.
  • Version control such as Git or GitHub.
  • Advantageous: knowledge of electronic components, PCA design and lab test equipment; plus FPGA design, ARM-based processor design, memory subsystems and basic printing technology.

What we offer

  • Full-time position with no shift premium.
  • 25% travel allowance.
  • No relocation package.

Questions fréquentes

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Source : ats:workday

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Published 5 hours ago

Expires 1 month from now

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hp

Singapore