NPU Design Lead / Engineer (Senior Staff)

About the role

This position is for a Senior Staff or Staff NPU Design Lead / Engineer who develops the design of Neural Processing Units (NPUs) from system-level specifications. The role covers microarchitecture design, RTL coding, performance modelling and close work with verification and software teams.

Key responsibilities

• Develop NPU design requirements from system-level specifications and model the performance of the NPU module and its data transaction throughput.
• Design the microarchitecture and write RTL code in Verilog / SystemVerilog for NPU sub-blocks.
• Understand the mathematics of convolution operators and fixed-point and floating-point arithmetic formats.
• Estimate, measure and optimise PPA (performance, power, area) and optimise the microarchitecture for low power and area.
• Work with verification engineers to test and debug the design, and support integration into the overall system, including lint, timing and CDC checks.
• Collaborate with software teams on compiler and toolchain development and debugging.
• Produce clear and concise design documentation.

Required profile

• 8+ years of digital design; 2-3 years of SoC design experience preferred.
• At least one completed cycle of NPU design experience.
• Hands-on digital design experience; preferably led a team of 3-4 people as a design lead.
• MSEE or BSEE in Electrical or Computer Engineering.
• Understanding of convolution operators and number systems.

Required skills

• Microarchitecture design and RTL coding in Verilog / SystemVerilog.
• Synthesis with power, timing and area analysis.
• UVM verification methodology (a plus).
• Deep learning algorithms such as CNN / Transformer (a plus).
• NPU / GPU / DSP design experience (a plus); ARM or RISC-V processor systems (a plus).