SoC Architect - Peripheral Subsystems

About the role

Ambiq, a semiconductor company focused on low-power chips for wearables, medical devices, IoT and edge AI, is looking for a SoC Architect to represent its Architecture function in the Singapore development office. You will be the primary architectural guide for the site's engineering team, focusing on the SoC's peripheral subsystems: audio, imaging and display, and high- and low-speed interfaces designed for battery-powered wearables and IoT devices.

Key responsibilities

• Write architecture specifications for the SoC's peripheral subsystems, including micro-architecture, flow and sequence diagrams, power and performance models and pseudocode used by RTL design and verification teams.
• Define off-die interfaces, including modes, electrical and protocol behavior, and integration requirements for boards, cables, connectors, PHYs and the software driver model.
• Debug RTL and gate level with the design team and partner with physical design to ensure robust implementation.
• Analyse power and performance trade-offs across die, package, board and software, and investigate and select IP with build-vs-license recommendations.
• Write integration specifications for system interfaces and external power management, and support post-silicon analysis and delivery to mass production.
• Define use cases and test cases for validation.

Required profile

• 8+ years in SoC or ASIC architecture and design, or silicon IP development, targeting wearable, IoT or mobile-class products.
• Proven track record of bringing low-power silicon architectures to market, from concept through specification, design and post-silicon validation.
• Experience architecting connections to the external world: audio (I2S, PDM), imaging and display (MIPI CSI/DSI), and USB, SPI, I2C.
• Strong systems-level thinking and ability to build consensus across geographically distributed teams; excellent written and verbal communication.
• BS in Electrical Engineering, Computer Engineering or Computer Science; MS or PhD preferred.
• Team lead or management experience is preferred; this is an individual contributor role.

Required skills

• Knowledge of SoC fabric and interconnect technologies, power management architecture and UPF/power-aware design flows.
• Hands-on experience with advanced process nodes.
• Understanding of low-power mobile consumer systems and embedded imaging or neural network processing.