Staff Engineer, Package-Silicon Integration

About the role

Micron's Package Development Engineering (PDE) organization is hiring a Staff Engineer in Package-Silicon Integration. You will drive package-silicon integration for next-generation NAND packaging technologies, collaborating across silicon design, wafer fabrication, package design, assembly, reliability and manufacturing to identify and mitigate chip-package interaction risks. You will independently lead complex technical workstreams and use AI-enabled, data-driven methods to accelerate engineering learning.

Key responsibilities

• Lead Chip-Package Interaction (CPI) risk assessments for new silicon, package architectures, materials and processes.
• Partner with silicon, package, wafer fab and assembly teams to resolve dicing, singulation, die integrity and integration challenges.
• Lead technical investigations using DOE, statistical analysis, physical characterization, failure analysis, reliability data and AI-enabled approaches.
• Drive root-cause analysis and solutions for yield, quality, reliability and manufacturability issues.
• Define and execute test vehicles, characterization strategies, process windows and qualification plans.
• Translate technical learning into design rules, specifications, FMEA controls and Best-Known Methods (BKMs).
• Leverage AI, automation and data analytics to improve engineering efficiency and decision-making.
• Drive technology readiness and transition of new silicon and package technologies into manufacturing.
• Identify integration and capability gaps and communicate technical risks and recommendations across teams and leadership.
• Provide technical guidance and mentoring while promoting effective AI-enabled ways of working.

Required profile

• Bachelor's degree or higher in Mechanical, Materials, Electrical/Electronic, Chemical, Semiconductor Engineering, Physics or a related technical discipline.
• Minimum 1 to 2 years of relevant semiconductor experience in package-silicon integration, advanced packaging, wafer technology, assembly, reliability, materials or process development.
• Demonstrated ability to independently lead complex technical investigations.
• Strong cross-functional collaboration, technical leadership and communication skills.

Required skills

• Understanding of semiconductor fabrication, packaging, assembly, materials and/or reliability.
• Experience in CPI, wafer/die mechanics, dicing, die integrity, package assembly, characterization, failure analysis or reliability.
• Experience with DOE, statistical analysis, root-cause analysis, DFMEA/PFMEA and structured problem solving.
• Ability to connect physical failure mechanisms to silicon, package, material and process interactions.
• Proficiency with data analytics, automation and AI-enabled tools, including critical assessment of AI-generated outputs.