Technology Development Process Engineer – Hybrid Bonding & Advanced Packaging
amat · Sgp
Job description
About the role
As a Technology Development Process Engineer you will lead the development and integration of hybrid bonding and advanced packaging solutions for logic, memory and 3‑D heterogeneous integration. You will work closely with R&D, equipment, materials and metrology teams to translate customer requirements into qualified manufacturing processes.
Key responsibilities
- Develop and optimize end‑to‑end hybrid bonding processes, including wafer/die surface preparation, cleaning, plasma activation, dielectric‑to‑dielectric and Cu‑Cu direct bonding, and post‑bond annealing.
- Design and execute DOE studies to define process windows, improve bond strength, reduce void density and control overlay accuracy.
- Investigate and resolve integration challenges such as CMP surface topography, surface chemistry, contamination, thermal budget and wafer warpage through data‑driven root‑cause analysis.
- Collaborate with equipment, materials, metrology and integration teams to scale die‑to‑wafer hybrid bonding for HBM, logic and 3‑D heterogeneous technologies.
- Define and implement characterization methods using optical inspection, IR imaging, SEM, AFM, XPS, contact‑angle, electrical testing and reliability evaluation.
- Engage customers, research institutes and ecosystem partners on joint technology development projects and generate technical reports, patents and roadmaps.
Required profile
- Bachelor’s, Master’s or PhD in Engineering, Materials Science, Physics or related field.
- Minimum 5 years of semiconductor experience in technology development, process integration or advanced packaging.
- Hands‑on experience with hybrid bonding, CMP, plasma processing, wet cleaning, TSV integration or process integration.
Required skills
- Hybrid bonding mechanisms and package integration flows.
- Design of experiments (DOE) and statistical analysis tools such as JMP or Minitab.
- Reliability testing, failure analysis and advanced metrology techniques (optical inspection, IR imaging, SEM, AFM, XPS, contact‑angle measurement, electrical test).
Questions fréquentes
Why are you reporting this job?
Explore further
Salaries, guides and searches in Singapore.
Salaries by job title
Apply in 30 seconds
Enter your email to apply. An account will be created automatically.
By continuing, you accept our terms of use.
Already have an account? Login
Published 1 day ago
Expires 1 month from now
7 views · 0 interested
Boost your chances
Upload your CV — we will match you with relevant openings.
Analyzing your CV...
amat
Sgp
Related job offers
-
Principal / Senior Reliability Engineer – Semiconductor Manufacturing
amat SGP -
Process Engineer – BEOL
amat SGP -
Senior Lead Ramp Process Engineer – PVD
amat SGP -
Technical Service Technician – Up to SGD 2,600 – 12‑hr Night Shift
HRNET VENTURES PTE. LTD. Singapore -
Control System Engineer – Automation Projects
EA RECRUITMENT PTE. LTD. Singapore