Principal Engineer – Integration Yield Defect

About the role

The Principal Engineer (Integration Yield Defect) leads YDD Associate Engineers and wafer‑tech operators to ensure continuous 24/7 inline shift operation. The role also trains and certifies DO Associate Engineers on recipe creation and defect‑source knowledge while maintaining internal SOPs and supporting audits.

Key responsibilities

• Supervise YDD Associate Engineers and wafer‑tech operators for smooth inline shift operation.
• Train and certify DO Associate Engineers on recipe creation and defect source knowledge.
• Operate FIB, SEM and EDX for inline failure analysis and create recipes in Brightfield, Darkfield and other YDD tools.
• Perform partition analysis, generate detailed defect reports and build a defect‑source library.
• Track inline defect performance weekly by layer, process, tool and chamber.
• Collaborate with process engineers, modules, vendors and equipment teams to troubleshoot and reduce defects.
• Automate daily activities to speed up troubleshooting and ensure wafer quality meets product requirements.

Required profile

• Masters or Bachelor degree in Electrical/Electronics/Chemical/Microelectronics Engineering.
• 5–8 years of relevant experience in high‑volume manufacturing of electronic components in an MNC or semiconductor environment.
• Familiarity with defect analysis and yield enhancement in wafer processes.
• Strong analytical abilities and capability to work under pressure in a fast‑paced setting.

Required skills

• FIB, SEM and EDX for failure analysis.
• Brightfield and Darkfield tools for recipe creation.
• MS PowerPoint, MS Excel, Excel VBA and PowerBI.