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Technical Specialist, Process Development & Scaled Pilot Production

NUS Enterprise · Singapour

🇬🇧 English
Wafer bonding MOCVD epitaxy CMP Thermal processing Yield engineering FMEA

Job description

About the role

The Technical Specialist will transform laboratory‑scale semiconductor processes—such as wafer bonding, photonic material integration, and module assembly—into repeatable, high‑yield pilot‑line operations capable of delivering industry‑grade sample lots. The role bridges proof‑of‑concept and full‑scale production, ensuring traceability, specification compliance, and supply‑chain stability.

Key responsibilities

  • Define the pilot‑line architecture and roadmap for target platforms (e.g., CMOS+III‑V, CMOS+GaN, TFLN bonded substrates).
  • Develop, optimise, and lock‑down process recipes for wafer bonding, MOCVD epitaxy, CMP, thermal steps, and metallisation.
  • Lead hands‑on scale‑up activities, including yield ramp, defect analysis, and process control implementation.
  • Establish critical‑to‑quality parameters, SPC/PC monitoring, and root‑cause analysis procedures.
  • Select, qualify, and maintain equipment required for pilot production, defining acceptance criteria and preventive‑maintenance plans.
  • Coordinate with external foundries and material suppliers to stabilise supply chains and ensure incoming‑spec compliance.
  • Produce comprehensive transfer documentation: process flows, BOMs, recipes, control plans, FMEAs, and traceability structures.
  • Lead a multidisciplinary engineering team, setting execution cadence and driving structured troubleshooting.

Required profile

  • Proven experience in semiconductor process development, integration, or pilot‑line scale‑up.
  • Hands‑on expertise in wafer bonding and epitaxial growth (III‑V and/or GaN) on 200 mm wafers.
  • Experience defining end‑to‑end process flows and transitioning technologies from lab to production.
  • Strong background in yield engineering, statistical process control, and equipment qualification.

Required skills

  • Wafer bonding
  • MOCVD epitaxy (III‑V, GaN)
  • CMP (chemical‑mechanical polishing)
  • Thermal processing and furnace operations
  • Metallisation readiness
  • Process flow design and documentation
  • Yield engineering and SPC/PC monitoring
  • Equipment selection, qualification, and preventive maintenance
  • FMEA and control‑plan development

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Published 1 month ago

Expires 3 weeks from now

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NUS Enterprise

Singapour