Memory Compiler Engineer – 2027 Campus Hire

About the role

We are seeking a campus hire to work on cutting‑edge SRAM compiler design for advanced technology nodes, delivering high‑quality design kits.

Key responsibilities

• Design SRAM compiler for cutting‑edge technology nodes and deliver high‑quality design kits.
• Collaborate with SRAM design and layout teams to ensure top‑notch kit delivery.
• Perform data analysis and develop platforms for memory usage big data.
• Execute physical verification (DRC/ERC/LVS/ANT/PERC) on the SRAM compiler.
• Run SPICE simulations for timing, power, and noise, and conduct QA checks.

Required profile

• Bachelor’s or Master’s degree in Electrical/Electronic Engineering, Computer Engineering or Computer Science.
• Strong multi‑tasking ability and self‑driven attitude to meet challenging schedules.
• Excellent interpersonal skills for working in a multicultural environment.

Required skills

• Proficiency in Perl, Shell, Python, and C/C++ programming languages.
• Knowledge of AI/ML algorithms and related infrastructure.
• Understanding of high‑performance, low‑power SRAM/ROM and VLSI design.
• Experience with EDA tools.