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Engineer, Uniformity Process Development

micron · Fab 10N/X

New
Mid 🇬🇧 English
Y3 Design of Experiments (DoE) regE process development 3D NAND

Job description

About the role

Micron's NAND Process Development (PD) group in Singapore is looking for a process development engineer to support technology development (TD) activities linked to the rapid deployment of new technology nodes, the process margin improvement work needed, and continued engagement with manufacturing on upcoming nodes. The role involves owning a process module for regE process characterization and advanced development for 3D NAND and beyond.

Key responsibilities

  • Work with process development engineers in Singapore and Boise, US, and with vendors to develop regE processes that meet integration requirements for next-generation 3D NAND nodes.
  • Transfer regE processes to high-volume manufacturing (Fab10) and drive continuous improvements to manufacturability.
  • Address wafer edge issues such as bevel defects and uniformity problems, working with the Fab10N team and business partners on tool choices.
  • Improve regE process margins to meet the mature yield goal for 3D NAND parts, and run experiments to widen margins and test manufacturability of next-node solutions.
  • Incorporate best-known manufacturing methods into early development of upcoming nodes.
  • Design and implement advanced process monitoring and control methodologies.
  • Act as a technical expert on process, procedure and equipment improvement projects, and lead complex, multi-functional projects and teams, including quality, process/yield and cost/productivity improvement meetings.
  • Advise management on major technical issues, lead innovation projects through patents and technical papers, and engage continuously with suppliers worldwide.

Required profile

  • Bachelor's degree or higher in Materials Science, Chemical Engineering or Physics, with at least 2 years of hands-on experience in regE process development.
  • Familiarity with regE process development and yield improvement, and understanding of integration and structural constraints related to wafer edges.
  • Understanding of the general process steps and flows for planar and vertical NAND memory.
  • Ability to collaborate with local and overseas teams, with excellent oral and written communication skills.
  • Self-motivated, adaptable to extended hours when required, and able to manage multiple projects in a demanding environment.

Required skills

  • Working knowledge of data analysis systems such as Y3.
  • Working knowledge of Design of Experiments (DoE).

Questions fréquentes

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Source : ats:workday

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Published 1 day ago

Expires 1 month from now

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micron

Fab 10N/X