I/O Design Engineer

About the role

Broadcom's Central Engineering Group is looking for an I/O Design Engineer with experience in analog and mixed-signal IC design. The engineer contributes to the design and verification of a wide range of IP and I/Os, including leading-edge AI programs on advanced nodes, within a collaborative team of engineers.

Key responsibilities

• Design CMOS I/O, high-precision bandgap references, op-amps, comparators and power-on-reset circuits.
• Run simulations to validate AC/DC performance, signal integrity, jitter and power.
• Perform transistor reliability and EMIR analysis.
• Work with layout teams on physical design and verification.
• Build Verilog, Synopsys Liberty and IBIS models.
• Create and maintain technical documentation such as datasheets, application notes and integration guides.
• Support chip-level integration and silicon bring-up in test chips and customer products.

Required profile

• MS or PhD in Electrical Engineering.
• 6+ years of I/O or analog circuit design experience.

Required skills

• Cadence Virtuoso schematic and layout capture, and SPICE/Spectre simulation.
• I/O protocols: GPIO, I2C, I3C, eMMC, RGMII and SPMI.
• Familiarity with ESD, EMI and signal integrity.
• Advanced CMOS FinFET and GAA process nodes, including features, technology limits and PPA tradeoffs.