Package Design Engineer - Flip-Chip BGA

About the role

Broadcom is looking for an experienced Package Design Engineer to design complex flip-chip BGA packages for high-performance ASICs used in AI, networking, HPC and 5G base stations. The work covers SerDes at 200G and higher, RF/microwave ADC/DAC, DDR and HBM, within a worldwide R&D team.

Key responsibilities

• Take overall design responsibility for ASIC package layouts and routing, working with package engineering experts on impedance matching, crosstalk, signal integrity, power integrity, manufacturability, reliability and thermal aspects.
• Design critical high-frequency, high data-rate structures for SerDes, ADC/DAC, DDR and HBM.
• Schedule, prioritize and track work across several projects at once.
• Work with a worldwide team across multiple time zones, including co-design with internal team members and external vendor designers.

Required profile

• B.Eng (EE/EEE) or similar with 5+ years in flip-chip BGA package design including high-speed SerDes, or M.Eng (EE/EEE) or similar with 3+ years.
• Preferrable: 8+ years (B.Eng) or 6+ years (M.Eng) in flip-chip BGA package design, and experience with 2.5D and 3DIC packages.
• Ability to cooperate with a global team and manage several projects at once.

Required skills

• Knowledge of package-level signal integrity and power integrity.
• Cadence Allegro (APD) experience preferred; equivalent tools considered.