Principal Component Validation Engineer – HBM

About the role

The Principal Component Validation Engineer will lead HBM component validation activities, coordinating with internal and external teams to ensure silicon meets product expectations. This role blends hardware and software expertise to drive testing, debugging, and continuous improvement of memory products.

Key responsibilities

• Coordinate preparation for silicon with internal and external teams.
• Work with manufacturing to secure resources and validate equipment needs.
• Identify, validate, and implement HBM component validation equipment and test flows.
• Debug silicon failures, determine root causes, and implement design or process fixes.
• Collaborate with Design Validation, Quality Assurance, and Global Quality teams on customer returns and reliability.
• Develop and deliver technical presentations and training for engineers.
• Participate in meetings, technical seminars, and act as product‑specific point of contact.

Required profile

• Bachelor’s or Master’s degree with at least 10 years of experience in the memory semiconductor industry.
• Strong balance of hardware and software skills.
• Proven ability to solve silicon issues and drive them to closure.
• Excellent problem‑solving, analytical, and communication abilities.

Required skills

• Linux operating system.
• Programming: Python, C, C++, Verilog, UVM.
• Version control: Git, SVN.
• Circuit debugging and hands‑on experience with analog and digital circuits.
• Data analysis tools: JMP, Python scripting.
• Automated Test Equipment: V93K, Magnum ATE.
• Basic understanding of HBM, DRAM operations and computer networking.