Principal Engineer – PD Advanced Dry Etch

About the role

Micron is hiring a Principal Engineer (or MTS, Member of Technical Staff) for its Next Generation NAND research and development dry etch team. The role leads critical dry etch modules and works closely with process integration and other process areas such as wet etch, CVD, diffusion, metals, lithography and CMP. It involves owning the process roadmap to meet program and yield goals.

Key responsibilities

• Lead dry etch technology and critical module development, including HAR, tier-by-tier etches, WL contacts and staircase structures
• Develop and innovate dry etch processes to meet structural and electrical specifications
• Collaborate with hardware teams to build equipment roadmaps for current and next-generation NAND products
• Demonstrate authority on dry etch fundamentals and a mechanistic understanding of how process parameters affect results
• Collaborate and lead cross-functional teams to solve complex structural problems
• Present process and technology roadmaps for current and future technology nodes, and proactively predict and mitigate future issues
• Contribute to the Technical Leadership Program and mentor less experienced engineers
• Interact with other process areas, guide their technology roadmaps and lead or join cross-functional task forces
• Act as a resource and mentor for dry etch peers and give project status updates to upper management

Required profile

• 6-10 years of experience in dry etch process development in R&D transferring to manufacturing, or 8-12 years with a bachelor's degree
• 4-5 years of NAND, DRAM or logic module development experience
• Master's or PhD in chemical, mechanical, electrical, material science, physics, chemistry or semiconductor engineering
• Leadership in problem solving and experience managing technical projects
• Preferred: head-to-head data science, Python coding and AI coding experience

Required skills

• Knowledge of plasma physics, plasma chemistry, transport or surface phenomena
• Understanding of RF plasma dry etch reactors and chemistries
• Statistical process control and analysis
• Solving scalability problems of deep high aspect ratio silicon/dielectric etches, including tailored pulsing schemes
• Strong computer skills, including MS Office and SAS software such as JMP