Research Associate (IC Design, RISC-V)

About the role

The School of Electrical and Electronic Engineering at Nanyang Technological University (NTU) is looking for a Research Associate with experience in RISC-V architecture. The successful candidate will add a Hardware AES and ASCON accelerator to the RISC-V CVA6 core, working closely with the AES and ASCON designers to integrate the accelerators and optimise their performance.

Key responsibilities

• Integrate a Hardware AES Accelerator and an ASCON lightweight cryptography accelerator into the RISC-V CVA6 (Ariane) core.
• Implement memory-mapped interfaces or custom instructions so the accelerators interface with the CVA6 core.
• Collaborate on integrating the accelerators into the core's execution pipeline.
• Define and implement custom RISC-V instructions, modify the decode and execution stages, and build the toolchain (assembler, compiler, simulator) support.
• Run simulations to evaluate performance, latency and throughput, and help test and debug the hardware integration.

Required profile

• Master's degree in Electrical Engineering, Computer Engineering or a related field.
• Proven experience with RISC-V, especially custom instruction extensions and pipeline modifications.
• Proficiency in HDL languages (Verilog, VHDL or SystemVerilog) and RTL design.
• Ability to extend assemblers and compilers (GCC, LLVM) for custom hardware instructions.
• Experience with FPGA prototyping tools such as Vivado, Quartus or similar.

Preferred skills

• Understanding of ASIC/FPGA design flows, including synthesis, place and route and timing closure.
• Experience implementing cryptographic algorithms (AES, ASCON) in hardware.

Only shortlisted candidates will be notified.