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Staff Engineer, NAND Product Reliability Architecture

micron · Fab 10N/X

New
Senior 🇬🇧 English
Python JMP Tableau JEDEC AI workflows

Job description

About the role

Micron's NAND Product Reliability Architecture (NRA) team defines how the company proves that every gigabyte of NAND storage holds data safely before a product is released. As Staff Engineer, you will own the reliability architecture for Micron's newest NAND products end-to-end: interpreting reliability requirements, architecting qualification and stress strategies, developing and integrating reliability algorithms and system features, and optimizing coverage, sampling and test time so that products qualify faster without compromising quality. This is a high-leverage, high-visibility role with close collaboration across Technology Development, System Architecture, Design Engineering, Product Engineering, Manufacturing and Quality.

Key responsibilities

  • Interpret NAND reliability specifications (internal, JEDEC and customer-specific) and architect qualification strategies, including stress conditions, coverage models, sampling plans, readout points and acceptance criteria.
  • Benchmark specifications across product generations, identify gaps and drive alignment with System and Quality teams.
  • Optimize sampling and flow coverage to reduce cost and test time while preserving statistical confidence, and design and release reliability test flows at wafer and component level.
  • Define and integrate reliability algorithms and system features, and develop reliability-focused test capabilities, including emulation, bench checkout and debugging.
  • Lead investigations of reliability failures and qualification gating issues, connect failure signatures to device, process, circuit, firmware or system behavior, and propose mitigations.
  • Build and deploy automation and AI workflows that reduce manual effort in flow generation, documentation, sampling design, data analysis and reporting, and champion responsible use of AI tools.
  • Represent Product Reliability in architecture and qualification reviews, mentor engineers and act as technical owner of an assigned product or reliability domain.

Required profile

  • PhD, or Master's degree with at least 3 years, or Bachelor's degree with at least 5 years of experience in microelectronics, materials science, physics or a related discipline.
  • At least 5 years of relevant experience in semiconductor reliability, product engineering, test, design, validation or system media architecture.
  • Hands-on experience in semiconductor reliability, product engineering, test, design, validation, firmware or system development.
  • Demonstrated architecture development capability, including coverage modeling, sampling design and trade-off analysis across quality, risk, cost and cycle time.
  • Strong statistical and data-analysis capability, and familiarity with industry reliability standards and qualification sampling methods.
  • Desirable: direct experience with NAND component or wafer-level reliability testing, qualification-flow development or electrical failure analysis.

Required skills

  • Solid understanding of non-volatile memory architecture, including program/erase/read algorithms, threshold-voltage distributions, page and block structure and error management.
  • Working knowledge of semiconductor device physics, circuits, process technology and failure mechanisms such as charge loss, read disturb, retention, cycling degradation and oxide breakdown.
  • Proficiency in Python, JMP, Tableau or equivalent tools.

Questions fréquentes

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Source : ats:workday

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Published 1 day ago

Expires 1 month from now

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micron

Fab 10N/X