III-V Wafer Fab Process Engineer (Lithography)

About the role

Broadcom is looking for a III-V Wafer Fab Process Engineer to develop, qualify and sustain photolithography and etch processes for III-V compound semiconductor devices, including InP and GaAs-based technologies. The engineer builds robust manufacturing processes for R&D and new products, optimizes yield and process capability, supports high-volume manufacturing and works with cross-functional teams.

Key responsibilities

• Develop and optimize photolithography processes and establish process windows for photoresist coating, bake and develop, exposure dose and focus, overlay accuracy, CD control, pattern fidelity and defectivity.
• Qualify photoresists, developers, BARCs and lithography materials, and develop processes for broadband, i-line, DUV (193 nm) and aligner/stepper/scanner platforms.
• Optimize lift-off lithography for metal patterning and support mask layout, reticle design and tape-out.
• Develop qualification plans for new lithography and etch equipment, define acceptance criteria and capability targets, run DOE, characterize processes and perform statistical analysis.
• Monitor process health with SPC, investigate excursions, troubleshoot yield and productivity issues, and support engineering lots, pilot production and high-volume manufacturing.
• Analyze yield loss, use 8D, 5 Why, Fishbone and FMEA for root cause analysis, and drive continuous improvement projects.
• Maintain WIs, control plans, PFMEA, OCAP, process recipes and ECOs.

Required profile

• Bachelor's, Master's or PhD in Electrical Engineering, Materials Science, Chemical Engineering, Physics or Microelectronics.
• 10+ years of semiconductor wafer fabrication experience.
• Minimum 10 years of direct experience in lithography and/or plasma etch processes.
• Experience with III-V semiconductor manufacturing is highly preferred.