Intern - PEE Diffusion (CMOS Matching & RegE WEE)

About the role

Micron is hiring an intern for its F10N/W CMOS Matching and RegE Wafer Edge Exclusion (WEE) program. The intern drives yield improvement by identifying inline mismatches, reducing wafer edge-related yield loss and developing analytical solutions that support sustainable manufacturing performance.

Key responsibilities

• F10 N/W CMOS Matching: run fab-to-fab offload studies to diagnose inline mismatches between N and W processes, perform bevel characterization to quantify defectivity impact on die loss, and analyze cross-module data to link process variation to yield.
• RegE WEE program: drive 22UE capability and 1H edge coat performance, troubleshoot and mitigate process detractors affecting WEE metrics, and develop a Wafer Inspection System (WIS) algorithm that captures true 22UE performance while excluding known detractors such as wet moisture signatures.
• Use data-mining tools to turn inline, defect and inspection data into actionable insights, and exercise engineering judgment to prioritize actions across cross-functional teams.

Required profile

• Strong background in semiconductor process engineering, yield analysis and defectivity characterization.
• Ability to perform root-cause analysis and turn data insights into manufacturing improvements.
• Strong ownership, problem-solving skills and collaboration across modules and functions.

Required skills

• Data analytics and statistical analysis.
• Proficiency with inspection and inline metrology tools.