Principal Engineer / MTS, PDE Package Design

About the role

Micron is hiring a Principal Engineer / MTS for its PDE Package Design team. The role owns package architecture and execution from feasibility through tape-out, qualification and production readiness, acting as technical authority for complex package issues and mentoring engineers.

Key responsibilities

• Own package architecture and execution from feasibility through tape-out, qualification and production readiness, delivering manufacturable, reliable and scalable solutions.
• Serve as technical authority for complex package issues, leading cross-functional reviews, trade-off decisions and risk closure across product, silicon, technology, assembly, quality, supplier and OSAT teams.
• Balance performance, reliability, manufacturability, cost, quality and schedule, and mentor engineers through difficult technical decisions.
• Advance design rules, methodologies, automation workflows and technology roadmaps for future products.
• Represent the packaging team in silicon-package-board co-design, integrating floorplan, interface, interconnect, power, signal, thermal and mechanical requirements.
• Apply baseline digital fluency and role-appropriate AI literacy to use AI-enabled tools responsibly for research, analysis, content creation, problem-solving and operational tasks.

Required profile

• Master's degree in Electrical Engineering, Mechanical Engineering, Materials Engineering or a related discipline; PhD candidates are welcome to apply.
• Minimum 10 years of relevant experience with deep expertise in package architecture and silicon-package co-design, including feasibility, stack-up, I/O and interconnect planning, substrate layout, routing, power delivery, signal return paths and design verification.
• Proven ownership of complex package designs from feasibility and trade-off studies through NPI tape-out, qualification and manufacturing handoff.
• MTS candidates must show organization-wide impact on roadmaps, standards or investment decisions.

Required skills

• Hands-on experience with multiple package technologies and strong knowledge of manufacturability, assembly processes, substrates, materials, reliability and failure mechanisms.
• Advanced proficiency with Cadence Allegro Package Designer / SiP Layout or equivalent package-design tools, including design-rule and review workflows.
• Strong technical leadership, mentoring and stakeholder communication skills.
• Integrates AI-assisted tools into daily work and shares AI-enabled improvements within their scope.