Campus Hire – Full Custom Layout Engineer

About the role

MediaTek’s Layout team implements top‑quality integrated‑circuit layouts for its chips. The team seeks result‑driven fresh graduates who can thrive in a fast‑paced environment and are eager to work with advanced semiconductor process technology.

Key responsibilities

• Implement high‑quality layout that meets designer specifications and project milestones.
• Perform physical and reliability verifications (DRC/LVS/ERC) to ensure tape‑out compliance.
• Collaborate with multi‑functional and multi‑site teams to optimise power, performance, area and schedule.
• Contribute to in‑house IP/library development.

Required profile

• Bachelor’s degree in Electrical/Electronic Engineering with transistor‑level knowledge.
• Exposure to EDA tools such as Cadence Virtuoso, Synopsys or Calibre through projects or internships.
• Strong analytical and problem‑solving abilities with attention to detail.
• Good work ethic, team player, effective cross‑team communication and time‑management skills.
• Proficiency in script programming (e.g., Tcl, Perl, C‑shell) is a plus.

Required skills

• Floor‑planning techniques, power‑mesh planning, critical block placement, critical signal routing.
• Synopsys layout editor and Cadence layout editor.
• Physical verification tools (DRC, LVS, ERC).
• Cadence Virtuoso, Synopsys tools, Calibre.
• Scripting languages: Tcl, Perl, C‑shell.