Senior Quality Engineer (Wafer)

About the role

The Senior Quality Engineer (Wafer) will lead on‑site quality control for silicon photonics chip production, ensuring that wafer testing, dicing and visual inspection meet the highest standards.

Key responsibilities

• Perform on‑site quality control of wafer testing, wafer dicing and chip visual inspection.
• Monitor and analyse production quality data using SPC, FMEA and other tools, identify risks and drive improvement actions.
• Lead investigations of quality abnormalities, develop corrective and preventive actions, and track their effectiveness.
• Develop and update quality inspection standards, and train operators and inspectors.
• Conduct regular process quality reviews, compile reports and promote continuous improvement.
• Collaborate with PDQE, FA and other teams on new product introductions and failure analysis.

Required profile

• Degree in Microelectronics, Semiconductor or related field.
• Minimum 3 years of PQE experience in semiconductor or silicon photonics chip manufacturing.
• Strong knowledge of wafer dicing, chip testing and visual inspection processes.
• Proven ability to use quality tools (SPC, FMEA, 8D, 5Why) independently.
• Familiarity with ISO9001 quality system and basic English/Mandarin reading skills.

Required skills

• SPC
• FMEA
• 8D
• 5Why
• ISO9001
• Wafer dicing
• Chip testing
• Visual inspection
• Silicon photonics chip production

What we offer

• Basic salary up to SGD 7,000 per month
• Additional allowances (AWS, VB, other allowances)
• Monday‑Friday schedule (8:30 am – 5:30 pm)