Foundation IP Memory Verification Engineer

About the role

We are seeking an energetic Foundation IP Memory Verification Engineer to join our Central Engineering Group. The role focuses on validating custom memory macros and compilers for AI products, working at the forefront of process technology.

Key responsibilities

• Validate memory designs, including custom macros and memory compilers.
• Perform functional verification, root‑cause analysis, and issue resolution.
• Conduct signal‑integrity, EM/IR, and reliability analyses to identify and mitigate design weaknesses.
• Run transistor‑level simulations for power‑up, lock‑up, timing, and margin verification.
• Execute QA and validation checks to ensure accurate timing and power models.
• Develop and maintain scripts that automate verification flows and data analysis.
• Support silicon debug activities and correlate results with SPICE models.
• Collaborate with memory designers, modeling leads, and managers to define and execute validation plans.

Required profile

• Bachelor’s degree in Electronics or Computer Engineering.
• Minimum of 2 years of relevant experience in memory verification or related fields.
• Strong communication, interpersonal, and leadership abilities.
• Self‑motivated, able to multitask, and eager to solve complex problems.

Required skills

• Understanding of transistor‑level circuit behavior and device physics.
• Experience with signal‑integrity, EM/IR, and reliability analysis.
• Proficiency in running circuit simulators and writing automation scripts.
• Familiarity with memory behavioral and physical models.
• Knowledge of memory circuit design, DFT schemes, and chip‑level integration (a plus).