Test Engineer – FPGA & SoC ATE Development

About the role

AMD is looking for a Test Engineer to support the launch and production of its FPGA, SoC and ACAP products. You will work closely with test pattern developers and product engineers to create and optimise automated test programs that ensure high quality and cost‑effective delivery.

Key responsibilities

• Develop and maintain ATE test programs for FPGA and SoC devices, integrating timing, voltage levels and test flow.
• Participate in New Product Introduction, generating, debugging and implementing new test patterns.
• Collaborate with product and yield engineers to define test requirements for yield and quality improvements.
• Lead productivity and cost‑reduction projects such as test‑time reduction and multi‑site testing.
• Implement and manage efuse operations, including reading fuse maps, secure burning procedures and verification.
• Analyse large test datasets to drive yield improvement, perform failure analysis and build automated dashboards and reports.

Required profile

• Enjoys new challenges and has strong analytical and problem‑solving abilities.
• Effective communicator who works well in cross‑functional teams.
• Fluent in spoken and written English.

Required skills

• 5+ years of ATE test program development experience.
• Hands‑on experience with Advantest T2000 and/or Verigy 93000 platforms.
• Advanced proficiency in Python and C++ for test development.
• Knowledge of efuse handling, secure burn procedures and verification.
• Understanding of symmetric and asymmetric cryptographic functions (AES, SHA, RSA/ECC).
• Ability to analyse test data, create dashboards and generate reports.