NPU Design Lead / Engineer (Senior Staff)

About the role

We are looking for a senior‑level NPU Design Lead/Engineer to drive the architecture and implementation of neural processing units within our SoC projects. The role involves translating system‑level specifications into micro‑architectural designs, leading a small design team, and collaborating closely with verification and software groups.

Key responsibilities

• Develop design requirements for NPU based on system‑level specifications.
• Model performance and data‑transaction throughput of the NPU module.
• Design micro‑architecture and write RTL code (Verilog/SystemVerilog) for NPU sub‑blocks.
• Estimate, measure and optimise performance, power and area (PPA) to meet targets.
• Work with verification engineers to ensure thorough testing and debug issues.
• Support integration, perform design checks, and resolve lint, timing and CDC problems.
• Collaborate with software teams on compiler and toolchain development and debugging.
• Produce clear design documentation.

Required profile

• 8+ years of digital design experience, with at least 2‑3 years in SoC design.
• Completed at least one full NPU design cycle.
• Previous leadership of a design team of 3‑4 engineers.
• Bachelor’s or Master’s degree in Electrical or Computer Engineering.
• Strong understanding of convolution operators and number systems (fixed‑point and floating‑point).
• Excellent communication skills and a quality‑mindset.

Required skills

• Verilog / SystemVerilog HDL
• RTL coding and micro‑architecture design
• Synthesis, power, timing and area analysis
• UVM verification methodology (plus)
• Experience with ARM or RISC‑V processor systems (plus)
• Knowledge of deep‑learning algorithms such as CNN and Transformer (plus)
• Familiarity with NPU, GPU or DSP design (plus)